MMIX Op Codes

Each instruction in MMIX has the four-byte form  OP X Y Z, where OP is one of the following 256 operations:

0 1 2 3 4 5 6 7
0x TRAP FCMP FUN FEQL FADD FIX FSUB FIXU 0x
FLOT[I] FLOTU[I] SFLOT[I] SFLOTU[I]
1x FMUL FCMPE FUNE FEQLE FDIV FSQRT FREM FINT 1x
MUL[I] MULU[I] DIV[I] DIVU[I]
2x ADD[I] ADDU[I] SUB[I] SUBU[I] 2x
2ADDU[I] 4ADDU[I] 8ADDU[I] 16ADDU[I]
3x CMP[I] CMPU[I] NEG[I] NEGU[I] 3x
SL[I] SLU[I] SR[I] SRU[I]
4x BN[B] BZ[B] BP[B] BOD[B] 4x
BNN[B] BNZ[B] BNP[B] BEV[B]
5x PBN[B] PBZ[B] PBP[B] PBOD[B] 5x
PBNN[B] PBNZ[B] PBNP[B] PBEV[B]
6x CSN[I] CSZ[I] CSP[I] CSOD[I] 6x
CSNN[I] CSNZ[I] CSNP[I] CSEV[I]
7x ZSN[I] ZSZ[I] ZSP[I] ZSOD[I] 7x
ZSNN[I] ZSNZ[I] ZSNP[I] ZSEV[I]
8x LDB[I] LDBU[I] LDW[I] LDWU[I] 8x
LDT[I] LDTU[I] LDO[I] LDOU[I]
9x LDSF[I] LDHT[I] CSWAP[I] LDUNC[I] 9x
LDVTS[I] PRELD[I] PREGO[I] GO[I]
Ax STB[I] STBU[I] STW[I] STWU[I] Ax
STT[I] STTU[I] STO[I] STOU[I]
Bx STSF[I] STHT[I] STCO[I] STUNC[I] Bx
SYNCD[I] PREST[I] SYNCID[I] PUSHGO[I]
Cx OR[I] ORN[I] NOR[I] XOR[I] Cx
AND[I] ANDN[I] NAND[I] NXOR[I]
Dx BDIF[I] WDIF[I] TDIF[I] ODIF[I] Dx
MUX[I] SADD[I] MOR[I] MXOR[I]
Ex SETH SETMH SETML SETL INCH INCMH INCML INCL Ex
ORH ORMH ORML ORL ANDNH ANDNMH ANDNML ANDNL
Fx JMP[B] PUSHJ[B] GETA[B] PUT[I] Fx
POP RESUME SAVE UNSAVE SYNC SWYM GET TRIP
8 9 A B C D E F

For example, code 20 (in hexadecimal) is ADD; code 21 is ADDI; code f0 is JMP; code f1 is JMPB; code f9 is RESUME.

Summary of Instructions

Here is an alphabetical list, showing also the format (0-4) by which bytes X, Y, and Z are interpreted, and any special registers that are involved:

282ADDUtimes 2 and add unsigned (1)
292ADDUItimes 2 and add unsigned immediate (2)
2A4ADDUtimes 4 and add unsigned (1)
2B4ADDUItimes 4 and add unsigned immediate (2)
2C8ADDUtimes 8 and add unsigned (1)
2D8ADDUItimes 8 and add unsigned immediate (2)
2E16ADDUtimes 16 and add unsigned (1)
2F16ADDUItimes 16 and add unsigned immediate (2)
20ADDadd (1) rA
21ADDIadd immediate (2) rA
22ADDUadd unsigned (1)
23ADDUIadd unsigned immediate (2)
C8ANDbitwise and (1)
C9ANDIbitwise and immediate (2)
CAANDNbitwise and-not (1)>
ECANDNHbitwise and-not high wyde (2)>
CBANDNIbitwise and-not immediate (1)>
EFANDNLbitwise and-not low wyde (3)>
EDANDNMHbitwise and-not medium high wyde (3)>
EEANDNMLbitwise and-not medium low wyde (3)>
D0BDIFbyte difference (1)
D1BDIFIbyte difference immediate (2)
4EBEVbranch if even (3)
4FBEVBbranch if even, backward (3)
40BNbranch if negative (3)
41BNBbranch if negative, backward (3)
48BNNbranch if nonnegative (3)
49BNNBbranch if nonnegative, backward (3)
4CBNPbranch if nonpositive (3)
4DBNPBbranch if nonpositive, backward (3)
4ABNZbranch if nonzero (3)
4BBNZBbranch if nonzero, backward (3)
46BODbranch if odd (3)
47BODBbranch if odd, backward (3)
44BPbranch if positive (3)
45BPBbranch if positive, backward (3)
42BZbranch if zero (3)
43BZBbranch if zero, backward (3)
30CMPcompare (1)
31CMPIcompare immediate (2)
32CMPUcompare unsigned (1)
33CMPUIcompare unsigned immediate (2)
6ECSEVconditionally set if even (1)
6FCSEVIconditionally set if even immediate (2)
60CSNconditionally set if negative (1)
61CSNIconditionally set if negative immediate (2)
68CSNNconditionally set if nonnegative (2)
69CSNNIconditionally set if nonnegative immediate (1)
6CCSNPconditionally set if nonpositive (1)
6DCSNPIconditionally set if nonpositive immediate (2)
6ACSNZconditionally set if nonzero (1)
6BCSNZIconditionally set if nonzero immediate (2)
66CSODconditionally set if odd (1)
67CSODIconditionally set if odd immediate (2)
64CSPconditionally set if positive (1)
65CSPIconditionally set if positive immediate (2)
94CSWAPcompare and swap octabytes (1) rP
95CSWAPIcompare and swap octabytes immediate (2) rP
62CSZconditionally set if zero (1)
63CSZIconditionally set if zero immediate (2)
1CDIVdivide (1) rA,rR
1DDIVIdivide immediate (2) rA,rR
1EDIVUdivide unsigned (1) rD,rR
1FDIVUIdivide unsigned immediate rD,rR (2)
04FADDfloating add (1) rA
01FCMPfloating compare (1) rA
11FCMPEfloating compare with respect to epsilon (1) rA,rE
14FDIVfloating divide (1) rA,rR
03FEQLfloating equal to (1) rA
13FEQLEfloating equal with respect to epsilon (1) rA,rE
17FINTfloating integerize (1, Y=0) rA
05FIXconvert floating to fixed (1) rA
07FIXUconvert floating to fixed unsigned (1) rA
08FLOTconvert fixed to floating (1) rA
09FLOTIconvert fixed to floating immediate (2) rA
0AFLOTUconvert fixed to floating unsigned (1) rA
0BFLOTUIconvert fixed to floating unsigned immediate (2) rA
10FMULfloating multiply (1) rA
16FREMfloating remainder (1) rA
15FSQRTfloating square root (1, Y=0) rA
06FSUBfloating subtract (1) rA
02FUNfloating unordered (1)
12FUNEfloating unordered with respect to epsilon (1) rE
FEGETget from special register (X=register, Y=0, Z=specreg) rA-rZZ
F4GETAget address (3)
F5GETABget address backward (3)
9EGOgo to location (1)
9FGOIgo to location immediate (2)
E4INCHincrease by high wyde (3)
E7INCLincrease by low wyde (3)
E5INCMHincrease by medium high wyde (3)
E6INCMLincrease by medium low wyde (3)
F0JMPjump (4)
F1JMPBjump backward (4)
80LDBload byte (1)
81LDBIload byte immediate (2)
82LDBUload byte unsigned (1)
83LDBUIload byte unsigned immediate (2)
92LDHTload high tetra (1)
93LDHTIload high tetra immediate (2)
8CLDOload octabyte (1)
8DLDOIload octabyte immediate (2)
8ELDOUload octabyte unsigned (1)
96LDUNCload octabyte uncached (1)
97LDUNCIload octabyte uncached immediate (2)
8FLDOUIload octabyte unsigned immediate (2)
90LDSFload short float (1)
91LDSFIload short float immediate (2)
88LDTload tetrabyte (1)
89LDTIload tetrabyte immediate (2)
8ALDTUload tetrabyte unsigned (1)
8BLDTUIload tetrabyte unsigned immediate (2)
98LDVTSload virtual translation status (1)
99LDVTSIload virtual translation status immediate
84LDWload wyde (1)
85LDWIload wyde immediate (2)
86LDWUload wyde unsigned (1)
87LDWUIload wyde unsigned immediate (2)
DCMORmultiple or (1)
DDMORImultiple or immediate (2)
18MULmultiply (1) rA
19MULImultiply immediate (2) rA
1AMULUmultiply unsigned (1) rH
1BMULUImultiply unsigned immediate (2) rH
D8MUXbitwise multiplex (1) rM
D9MUXIbitwise multiplex immediate (2) rM
DEMXORmultiple exclusive-or (1)
DFMXORImultiple exclusive-or immediate (2)
CCNANDbitwise not and (1)
CDNANDIbitwise not and immediate (2)
34NEGnegate (1, Y=unsigned immediate) rA
35NEGInegate immediate (2, Y=unsigned immediate) rA
36NEGUnegate unsigned (1, Y=unsigned immediate)
37NEGUInegate unsigned immediate (2, Y=unsigned immediate)
C4NORbitwise not-or (1)
C5NORIbitwise not-or immediate (2)
CENXORbitwise not-exclusive-or (1)
CFNXORIbitwise not-exclusive-or immediate (2)
D6ODIFocta difference (1)
D7ODIFIocta difference immediate (2)
C0ORbitwise or (1)
E8ORHbitwise or with high wyde (3)
C1ORIbitwise or immediate (2)
EBORLbitwise or with low wyde (3)
E9ORMHbitwise or with medium high wyde (3)
EAORMLbitwise or with medium low wyde (3)
C2ORNbitwise or-not (1)
C3ORNIbitwise or-not immediate (2)
5EPBEVprobable branch if even (3)
5FPBEVBprobable branch if even, backward (3)
50PBNprobable branch if negative (3)
51PBNBprobable branch if negative, backward (3)
58PBNNprobable branch if nonnegative (3)
59PBNNBprobable branch if nonnegative, backward (3)
5CPBNPprobable branch if nonpositive (3)
5DPBNPBprobable branch if nonpositive, backward (3)
5APBNZprobable branch if nonzero (3)
5BPBNZBprobable branch if nonzero, backward (3)
56PBODprobable branch if odd (3)
57PBODBprobable branch if odd, backward (3)
54PBPprobable branch if positive (3)
55PBPBprobable branch if positive, backward (3)
52PBZprobable branch if zero (3)
53PBZBprobable branch if zero, backward (3)
F8POPpop (3) rJ,rL
9CPREGOprefetch to go (1, X=count)
9DPREGOIprefetch to go immediate (2, X=count)
9APRELDpreload data (1, X=count)
9BPRELDIpreload data immediate (2, X=count)
BAPRESTprestore data (1, X=count)
BBPRESTIprestore data immediate (2, X=count)
BEPUSHGOpush registers and go (1) rJ,rL
BFPUSHGOIpush registers and go immediate (2) rJ,rL
F2PUSHJpush registers and jump (3) rJ,rL
F3PUSHJBpush registers and jump backward (3) rJ,rL
F6PUTput into special register (X=specreg, Y=0, Z=register) rA-rZZ
F7PUTIput into special register immediate (X=specreg, Y=0, Z=unsigned immediate) rA-rZZ
F9RESUMEresume after interrupt (4) rW,rX,rY,rZ
DASADDsideways add (1)
DBSADDIsideways add immediate (2)
FASAVEsave context (X=register, Y=Z=0) rA,rB,rD,rE,rG,rH,rJ,rL,rM,rO,rP,rR,rS,rW,rX,rY,rZ
E0SETHset to high wyde (3)
E3SETLset to low wyde (3)
E1SETMHset to medium high wyde (3)
E2SETMLset to medium low wyde (3)
0CSFLOTconvert fixed to short float (1) rA
0DSFLOTIconvert fixed to short float immediate (2) rA
0ESFLOTUconvert fixed to short float unsigned (1) rA
0FSFLOTUIconvert fixed to short float unsigned immediate (2) rA
38SLshift left (1) rA
39SLIshift left immediate (2) rA
3ASLUshift left unsigned (1)
3BSLUIshift left unsigned immediate (2)
3CSRshift right (1) rA
3DSRIStanford Research Institute (2) rA
3ESRUshift right unsigned (1)
3FSRUIshift right unsigned immediate (2)
A0STBstore byte (1) rA
A1STBIstore byte immediate (2) rA
A2STBUstore byte unsigned (1)
A3STBUIstore byte unsigned immediate (2)
B4STCOstore constant octabyte (X=const, Y=register, Z=register)
B5STCOIstore constant octabyte immediate (X=const, Y=register, Z=unsigned immediate)
B2STHTstore high tetra (1)
B3STHTIstore high tetra immediate (2)
ACSTOstore octabyte (1)
ADSTOIstore octabyte immediate (2)
AESTOUstore octabyte unsigned (1)
B6STUNCstore octabyte uncached (1)
B7STUNCIstore octabyte uncached immediate (2)
AFSTOUIstore octabyte unsigned immediate (2)
B0STSFstore short float (1) rA
B1STSFIstore short float immediate (2) rA
A8STTstore tetrabyte (1) rA
A9STTIstore tetrabyte immediate (2) rA
AASTTUstore tetrabyte unsigned (1)
ABSTTUIstore tetrabyte unsigned immediate (2)
A4STWstore wyde (1) rA
A5STWIstore wyde immediate (2) rA
A6STWUstore wyde unsigned (1)
A7STWUIstore wyde unsigned immediate (2)
24SUBsubtract (1) rA
25SUBIsubtract immediate (2) rA
26SUBUsubtract unsigned (1)
27SUBUIsubtract unsigned immediate (2)
FDSWYMsympathize with your machinery (0)
FCSYNCsynchronize (4)
B8SYNCDsynchronize data (1, X=count)
B9SYNCDIsynchronize data immediate (2, X=count)
BCSYNCIDsynchronize instructions and data (1, X=count)
BDSYNCIDIsynchronize instructions and data immediate (2, X=count)
D4TDIFtetra difference (1)
D5TDIFItetra difference immediate (2)
00TRAPtrap (0) rBB,rWW,rXX,rYY,rZZ
FFTRIPtrip (0) rB,rW,rX,rY,rZ
FBUNSAVEunsave context (X=Y=0, Z=register) rA,rB,rD,rE,rG,rH,rJ,rL,rM,rO,rP,rR,rS,rW,rX,rY,rZ
D2WDIFwyde difference (1)
D3WDIFIwyde difference immediate (2)
C6XORbitwise exclusive-or (1)
C7XORIbitwise exclusive-or immediate (2)
7EZSEVzero or set if even (1)
7FZSEVIzero or set if even immediate (2)
70ZSNzero or set if negative (1)
71ZSNIzero or set if negative immediate (2)
78ZSNNzero or set if nonnegative (1)
79ZSNNIzero or set if nonnegative immediate (2)
7CZSNPzero or set if nonpositive (1)
7DZSNPIzero or set if nonpositive immediate (2)
7AZSNZzero or set if nonzero (1)
7BZSNZIzero or set if nonzero immediate (2)
76ZSODzero or set if odd (1)
77ZSODIzero or set if odd immediate (2)
74ZSPzero or set if positive (1)
75ZSPIzero or set if positive immediate (2)
72ZSZzero or set if zero (1)
73ZSZIzero or set if zero immediate (2)

Formats

(0) X, Y, Z arbitrary
(1) X=register, Y=register, Z=register
(2) X=register, Y=register, Z=unsigned immediate
(3) X=register, YZ=unsigned immediate
(4) XYZ=unsigned immediate

Special Registers

rAarithmetic status register21
rBbootstrap register00
rCcontinuation register08
rDdividend register01
rEepsilon register02
rFfailure location register22
rGglobal threshold register19
rHhimult register03
rIinterval counter12
rJreturn-jump register04
rKinterrupt mask register15
rLlocal threshold register20
rMmultiplex mask register05
rNserial number09
rOregister stack offset10
rPprediction register23
rQinterrupt request register16
rRremainder register06
rSregister stack pointer11
rTtrap address register13
rUusage counter17
rVvirtual translation register18
rWwhere-interrupted register (user)24
rXexecution register (user)25
rYY operand (user)26
rZZ operand (user)27
rBBbootstrap register (kernel)07
rTTdynamic trap address register14
rWWwhere-interrupted register (kernel)28
rXXexecution register (kernel)29
rYYY operand (kernel)30
rZZZ operand (kernel)31

Special Bit Codes

TRIP codes DVWIOUZX (for rA)
Dinteger divide check
Vinteger overflow
Wfloat-to-fix overflow
Iinvalid floating operation
Ofloating overflow
Ufloating underflow
Zfloating division by zero
Xfloating inexact
round nearest (00), off (01), up (10), down (11)

TRAP codes rwxnkbsp (for rQ and rK)
rread permission lacking
wwrite permission lacking
xexecute permission lacking
nnegative data address
kkernel permission lacking
bbad (illegal) instruction
ssecurity violation
pprivileged instruction address

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